Sensor-based designs, such as IoT systems, combine many design domains implemented on CMOS (Figure 1). These systems can be implemented on multiple dies and could employ multiple packages. To … [Read more...] about Implementing a Multi-Domain System
White Papers
Fabless Challenges of Integrating Complex Silicon into the IC Package, Even the System PCB
As the world continues to demand more performance, bandwidth, and capacity from smaller, lighter, and lowerpower products, so the increase in High Density Advance Packaging (HDAP) usage will … [Read more...] about Fabless Challenges of Integrating Complex Silicon into the IC Package, Even the System PCB
PCIe Simulation Speed-Up Using Mentor QVIP with PLDA PCIe Controller for DMA Applications
PCI Express® (PCIe®) is a dominant technology for hardware applications requiring high-speed connectivity between networking, storage, FPGA, and GPGPU boards to servers and desktop systems. It is a … [Read more...] about PCIe Simulation Speed-Up Using Mentor QVIP with PLDA PCIe Controller for DMA Applications
Using Vias to Improve PCB Density
Rather than using numerous through-holes in a multi-layer PCB, designers have found that using blind and buried vias can tremendously increase routing density. Learn the best ways to design with vias … [Read more...] about Using Vias to Improve PCB Density
DAC Brief: Showcasing the Latest Innovations in Analog Mixed-Signal Verification
This brief provides a high level summary of advancements in Mentor’s AMS Verification solutions since we saw you all last year at DAC 2019 in Las Vegas. Products featured: Analog FastSPICE Platform, … [Read more...] about DAC Brief: Showcasing the Latest Innovations in Analog Mixed-Signal Verification
Using Built-In-Self-Test Hardware to Satisfy ISO 26262
Semiconductor content in today’s vehicles is growing rapidly and we are approaching the point where the value of the electronics is expected to exceed 50% of the total vehicle cost. A growing … [Read more...] about Using Built-In-Self-Test Hardware to Satisfy ISO 26262
Status Update + Latest Innovations in High-Level Synthesis, Verification & RTL Low-Power
Catapult® High-Level Synthesis (HLS) is hot in markets like Deep Learning/AI, Computer Vision, Communication (5G, IoT), and Video, just to name a few. Designing at the C++ or SystemC-level with a fast … [Read more...] about Status Update + Latest Innovations in High-Level Synthesis, Verification & RTL Low-Power
PRECISION THAT HELPS SAVE LIVES
AOP Technologies, a leading distributor of pneumatic, automation, fluid-handling and seal components, was recently tasked with developing a new electronic monitoring solution for a customer that … [Read more...] about PRECISION THAT HELPS SAVE LIVES
UVM – “Stop Hitting Your Brother” – Coding Guidelines
UVM promised a perfect world where a common set of guidelines for testbenches and connected verification IP would make a compatible, simpler world. Just don’t look too closely at the standard. UVM … [Read more...] about UVM – “Stop Hitting Your Brother” – Coding Guidelines
Multi Mode CDC Verification Enables Analysis Efficiency and Accuracy
In this paper we will show how an automated modal CDC analysis can be used to exhaustively verify CDC issues in all test and operational modes of a large SoC with multiple IPs. Modal CDC analysis … [Read more...] about Multi Mode CDC Verification Enables Analysis Efficiency and Accuracy