Electrical rule checking (ERC) verifies the robustness of a schematic or layout design, ensuring that circuits will operate as designed and intended. ERC violations can result in reduced yield, or worse, potential circuit malfunction or electrical failure after product delivery. With its logic-driven layout framework, automated voltage propagation, and the ability to combine physical and electrical information to determine context, the Calibre PERC platform enables automated sign-off quality verification for today’s most complex ERC at various design stages, including intellectual property (IP), block, and full-chip levels.
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