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Improve Logic Test with a Hybrid ATPG/BIST Solution

December 1, 2014 By

COVER

Mentor Graphics Logo

Two test strategies are used to test virtually all IC logic automatic test pattern generation (ATPG) with test pattern compression, and logic built-in self-test (BIST). For many years, there was a passionate debate between some DFT practitioners about which is the best test method ATPG or BIST. ATPG has been dominant for years, and is now used for full-chip test across the electronics industry. More recently, the use of logic BIST has increased with the higher demand to be able to test chips in a system or with limited tester interface, such as for burn-in test, board test, and MCM (multi-chip module).

Filed Under: Mentor Graphics, Test & Measurement

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