With increased complexity in design layout requirements at each new node, the compute burden placed on physical verification has grown exponentially. At the same time, designers are generally faced with less time to get their designs out the door. In this white paper, we detail the key steps you can take to help ensure you are achieving the best throughput while optimizing run times. Topics include: Benefits of using the latest foundry rule decks; Advantages of moving to the most recent Calibre releases; Best practices for leveraging multiple compute resources to scale PV runtimes.
Download this white paper from Mentor Graphics to learn more…