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AI Accelerator Ecosystem: An Overview

September 18, 2020 By

Companies worldwide trust the Catapult HLS Platform for designing and verifying machine learning accelerators and connecting them to systems. But, Mentor has taken a big step farther and offers an AI accelerator ecosystem that provides AI designers with an environment to jumpstart their projects. … [Read more...]

Filed Under: Mentor Graphics, New White Papers, White Papers

5G Verification is Impossible without Emulation

September 15, 2020 By

Emulation, combined with a rich assortment of virtualized versions of the many protocols that 5G will require, is the only practical way of ensuring that the first round of silicon built will be the production version, able to handle all of the functions and configurations that it might be faced … [Read more...]

Filed Under: Mentor Graphics, New White Papers, White Papers

Autonomous Drive Requires Smart Sensor Systems

September 10, 2020 By

While exotic technology for autonomous drive cars draw wonder all around the world, individual smart sensor systems with “simple” jobs to do are equally important. LiDAR sensors with specialized AI chips for object identification are fascinating. But “simple” smart sensor systems, like passenger … [Read more...]

Filed Under: Mentor Graphics, New White Papers, White Papers

Implementing a Multi-Domain System

August 24, 2020 By

Sensor-based designs, such as IoT systems, combine many design domains implemented on CMOS (Figure 1). These systems can be implemented on multiple dies and could employ multiple packages. To accommodate multiple sensor types, a traditional CMOS IC flow must be extended to include MEMS and photonics … [Read more...]

Filed Under: Mentor Graphics, New White Papers, White Papers

Fabless Challenges of Integrating Complex Silicon into the IC Package, Even the System PCB

August 24, 2020 By

As the world continues to demand more performance, bandwidth, and capacity from smaller, lighter, and lowerpower products, so the increase in High Density Advance Packaging (HDAP) usage will grow. Extremely-high pin-count devices, such as ECUs, APUs, CPUs, GPUs, MCUs, and FPGAs, have changed the … [Read more...]

Filed Under: Mentor Graphics, New White Papers, White Papers

PCIe Simulation Speed-Up Using Mentor QVIP with PLDA PCIe Controller for DMA Applications

August 24, 2020 By

PCI Express® (PCIe®) is a dominant technology for hardware applications requiring high-speed connectivity between networking, storage, FPGA, and GPGPU boards to servers and desktop systems. It is a robust technology that has evolved over decades to keep up with advancements in throughput and speed … [Read more...]

Filed Under: Mentor Graphics, New White Papers, White Papers

DAC Brief: Showcasing the Latest Innovations in Analog Mixed-Signal Verification

August 14, 2020 By

This brief provides a high level summary of advancements in Mentor’s AMS Verification solutions since we saw you all last year at DAC 2019 in Las Vegas. Products featured: Analog FastSPICE Platform, Symphony Mixed-Signal Platform, Solido Variation Designer, and Solido Characterization … [Read more...]

Filed Under: Mentor Graphics, New White Papers, White Papers

Using Built-In-Self-Test Hardware to Satisfy ISO 26262

August 14, 2020 By

Semiconductor content in today’s vehicles is growing rapidly and we are approaching the point where the value of the electronics is expected to exceed 50% of the total vehicle cost. A growing proportion of the modern-day automotive electronics are there to support new advanced driver-assistance … [Read more...]

Filed Under: Mentor Graphics, New White Papers, White Papers

Status Update + Latest Innovations in High-Level Synthesis, Verification & RTL Low-Power

August 14, 2020 By

Catapult® High-Level Synthesis (HLS) is hot in markets like Deep Learning/AI, Computer Vision, Communication (5G, IoT), and Video, just to name a few. Designing at the C++ or SystemC-level with a fast path to highest QofR (performance, area and power) for both FPGA and ASIC. Catapult’s ecosystem is … [Read more...]

Filed Under: Mentor Graphics, New White Papers, White Papers

UVM – “Stop Hitting Your Brother” – Coding Guidelines

August 12, 2020 By

UVM promised a perfect world where a common set of guidelines for testbenches and connected verification IP would make a compatible, simpler world. Just don’t look too closely at the standard. UVM carries baggage from previous standards such as OVM, VMM, eRM, AVM, and more. This paper describes … [Read more...]

Filed Under: Mentor Graphics, New White Papers, White Papers

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